We wanted to check the remote control output while we debugged the color changing pumpkin. Usually we’d use a Saleae Logic, but instead we made an experimental logic analyzer firmware for the Bus Pirate.

***BIG WARNING*** The Bus Pirate will never be a substitute for a ‘proper’ logic analyzer, the hardware isn’t designed for it. The Bus Pirate can’t store a lot of samples, it can’t feed live samples very fast, and speeds will be in the kHz, not MHz. This test firmware records 4096 samples at a fixed 10kHz sampling rate.

Despite the limitations of the Bus Pirate hardware, our logic analyzer worked well enough to examine decoded IR remote signals. It’s also well suited to debug environments where you can control the bus speed (and the Bus Pirate may already be connected for other reasons).

We’re releasing the logic analyzer as a separate firmware for v2go and v3 only, but once it’s improved we plan to integrate it into the trunk. Documentation below.

There’s still time to get a Bus Pirate v3, $30 including worldwide shipping.

Logic analyzer specs

This test firmware records 4096 samples at a fixed 10kHz sampling rate. Future releases could easily sample up to about 1MHz, but the test firmware doesn’t support sample rate adjustments. Sampling is triggered by any change on any pin.

The five major IO pins are included in analyzer output:

  • chan0 – CS
  • chan1 – MISO
  • chan2 – CLK
  • chan3 – MOSI
  • chan4 – AUX

The firmware works with the open source Java SUMP logic analyzer client. There’s a bunch of SUMP builds out there, you can read about a few of them in our SUMP roundup.

SUMP follows a simple protocol. We’ve only implemented the minimum command set: reset, run, ID. Other commands are received, but the contents are ignored. Sample speed, trigger pins and directions, etc could be handled with an update, your patches are welcome.

What you’ll need

Load the logic analyzer firmware into your Bus Pirate v2go or v3 using your normal Windows or Python (MAC OSX/LINUX) update method. You can return to the normal Bus Pirate firmware later using the same procedure.

Using the logic analyzer


Open SUMP. Press the rocket button. Configure SUMP as shown here.

Change the serial port to match the normal Bus Pirate serial port on your system. Uncheck channel groups 2, 3, and 4. We capture a fixed 4000 samples (actually 4096), but SUMP will also accept a smaller sample size and ignore the extra data. The speed setting is ignored, but it tells SUMP how to label the sample increments.


Click ‘capture’ to arm the logic analyzer. The MODE LED lights to indicate that the analyzer is armed.

The first change on any pin triggers sampling. 4096 samples are captured at 10kHz, and the LED turns off. Samples are sent to SUMP, and then displayed.

Improving the logic analyzer

Here’s our tentative goals for the logic analyzer

  1. Adjustable speed up to 800kHz – 1MHz
  2. Pin trigger selection (with direction?)
  3. Integrate into trunk
  4. Presampling, rolling sample buffer, etc.