Merve is working on an Arduino-driven logic analyzer design in the Arduino Forum. It uses logic chips to drive SRAM memory during acquisition, the Arduino then dumps samples from the SRAM via a shift register.

We’re really interested in the result of this design. We once attempted a logic chip-based analyzer, but the design got complicated at high speeds because of the need for 16bit+ synchronous counters to drive the SRAM. Instead, we moved to CPLDs to try and squeeze all the logic ICs into a single, reprogrammable chip.

Several readers submitted a link to this post, thanks for the tip!

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